<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.5"/>
<title>aiengine: XAieGbl_1stIrqCntr Struct Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
  $(window).load(resizeHeight);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">aiengine
   </div>
   <div id="projectbrief">Vitis Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.5 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li class="current"><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
    </ul>
  </div>
  <div id="navrow2" class="tabs2">
    <ul class="tablist">
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="functions.html"><span>Data&#160;Fields</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('struct_x_aie_gbl__1st_irq_cntr.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle">
<div class="title">XAieGbl_1stIrqCntr Struct Reference</div>  </div>
</div><!--header-->
<div class="contents">

<p>This typedef contains the attributes for 1st level interrupt controller set irq event register.  
 <a href="struct_x_aie_gbl__1st_irq_cntr.html#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a9751be05f8f1d085db131e370f672ebe"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a9751be05f8f1d085db131e370f672ebe">SwitchOff</a></td></tr>
<tr class="memdesc:a9751be05f8f1d085db131e370f672ebe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Switch offset.  <a href="#a9751be05f8f1d085db131e370f672ebe">More...</a><br/></td></tr>
<tr class="separator:a9751be05f8f1d085db131e370f672ebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae08b2f3f2db876afc435f8ba2a9a4783"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#ae08b2f3f2db876afc435f8ba2a9a4783">MaskOff</a></td></tr>
<tr class="memdesc:ae08b2f3f2db876afc435f8ba2a9a4783"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask register offset.  <a href="#ae08b2f3f2db876afc435f8ba2a9a4783">More...</a><br/></td></tr>
<tr class="separator:ae08b2f3f2db876afc435f8ba2a9a4783"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a6a0c39de21603a5936741110c491a2"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a6a6a0c39de21603a5936741110c491a2">EnableOff</a></td></tr>
<tr class="memdesc:a6a6a0c39de21603a5936741110c491a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable register offset.  <a href="#a6a6a0c39de21603a5936741110c491a2">More...</a><br/></td></tr>
<tr class="separator:a6a6a0c39de21603a5936741110c491a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2034d6df061c0f43c715bf1a3bd58e50"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a2034d6df061c0f43c715bf1a3bd58e50">DisableOff</a></td></tr>
<tr class="memdesc:a2034d6df061c0f43c715bf1a3bd58e50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable register offset.  <a href="#a2034d6df061c0f43c715bf1a3bd58e50">More...</a><br/></td></tr>
<tr class="separator:a2034d6df061c0f43c715bf1a3bd58e50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4029ca496331d2f4af1650a1e87f9500"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a4029ca496331d2f4af1650a1e87f9500">StatusOff</a></td></tr>
<tr class="memdesc:a4029ca496331d2f4af1650a1e87f9500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status register offset.  <a href="#a4029ca496331d2f4af1650a1e87f9500">More...</a><br/></td></tr>
<tr class="separator:a4029ca496331d2f4af1650a1e87f9500"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6052b98ff1dfec4fa40aff2114eedff0"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a6052b98ff1dfec4fa40aff2114eedff0">IrqNoOff</a></td></tr>
<tr class="memdesc:a6052b98ff1dfec4fa40aff2114eedff0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Irq number register offset.  <a href="#a6052b98ff1dfec4fa40aff2114eedff0">More...</a><br/></td></tr>
<tr class="separator:a6052b98ff1dfec4fa40aff2114eedff0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a17b1fdfcddd578bb793a0b77db6eccfc"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a17b1fdfcddd578bb793a0b77db6eccfc">IrqEventOff</a></td></tr>
<tr class="memdesc:a17b1fdfcddd578bb793a0b77db6eccfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Irq event register offset.  <a href="#a17b1fdfcddd578bb793a0b77db6eccfc">More...</a><br/></td></tr>
<tr class="separator:a17b1fdfcddd578bb793a0b77db6eccfc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3cd399f6ae31b2845e452e17191c268c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a3cd399f6ae31b2845e452e17191c268c">BlockNorthSetOff</a></td></tr>
<tr class="memdesc:a3cd399f6ae31b2845e452e17191c268c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block north set register offset.  <a href="#a3cd399f6ae31b2845e452e17191c268c">More...</a><br/></td></tr>
<tr class="separator:a3cd399f6ae31b2845e452e17191c268c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7a214c6694e509774e2de91c9e5826dd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a7a214c6694e509774e2de91c9e5826dd">BlockNorthClearOff</a></td></tr>
<tr class="memdesc:a7a214c6694e509774e2de91c9e5826dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block north clear register offset.  <a href="#a7a214c6694e509774e2de91c9e5826dd">More...</a><br/></td></tr>
<tr class="separator:a7a214c6694e509774e2de91c9e5826dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6153abe885312a0db52bdb794f64d477"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a6153abe885312a0db52bdb794f64d477">BlockNorthValueOff</a></td></tr>
<tr class="memdesc:a6153abe885312a0db52bdb794f64d477"><td class="mdescLeft">&#160;</td><td class="mdescRight">Block north value register offset.  <a href="#a6153abe885312a0db52bdb794f64d477">More...</a><br/></td></tr>
<tr class="separator:a6153abe885312a0db52bdb794f64d477"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ac949b94c8f2de1f000fde19821042e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a0ac949b94c8f2de1f000fde19821042e">IrqsMask</a></td></tr>
<tr class="memdesc:a0ac949b94c8f2de1f000fde19821042e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Irqs mask enable/disable/mask register field.  <a href="#a0ac949b94c8f2de1f000fde19821042e">More...</a><br/></td></tr>
<tr class="separator:a0ac949b94c8f2de1f000fde19821042e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a34453c066e03c5606ed2c6c52bb23db8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a34453c066e03c5606ed2c6c52bb23db8">IrqNoFld</a></td></tr>
<tr class="memdesc:a34453c066e03c5606ed2c6c52bb23db8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Irq No.  <a href="#a34453c066e03c5606ed2c6c52bb23db8">More...</a><br/></td></tr>
<tr class="separator:a34453c066e03c5606ed2c6c52bb23db8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1960a15d37b0071efe39434aff37c59c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#a1960a15d37b0071efe39434aff37c59c">BcEvents</a></td></tr>
<tr class="memdesc:a1960a15d37b0071efe39434aff37c59c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Broadcast events field.  <a href="#a1960a15d37b0071efe39434aff37c59c">More...</a><br/></td></tr>
<tr class="separator:a1960a15d37b0071efe39434aff37c59c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac30812cbbcaec2344ab0a9ced78c07d6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html#ac30812cbbcaec2344ab0a9ced78c07d6">IrqEventRegFld</a> [4U]</td></tr>
<tr class="memdesc:ac30812cbbcaec2344ab0a9ced78c07d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Irq event register field.  <a href="#ac30812cbbcaec2344ab0a9ced78c07d6">More...</a><br/></td></tr>
<tr class="separator:ac30812cbbcaec2344ab0a9ced78c07d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains the attributes for 1st level interrupt controller set irq event register. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a class="anchor" id="a1960a15d37b0071efe39434aff37c59c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a> XAieGbl_1stIrqCntr::BcEvents</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Broadcast events field. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ab0f0a542ca10735adbc7511c8480bcfa">XAieTile_PlIntcL1BlockNorthClr()</a>, <a class="el" href="xaietile__pl_8h.html#ae9f78282ff8fe22f8068639dbdb8f217">XAieTile_PlIntcL1BlockNorthSet()</a>, and <a class="el" href="xaietile__pl_8h.html#ad72be00d9602288b22dd4770aaa36af2">XAieTile_PlIntcL1BlockNorthVal()</a>.</p>

</div>
</div>
<a class="anchor" id="a7a214c6694e509774e2de91c9e5826dd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::BlockNorthClearOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Block north clear register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ab0f0a542ca10735adbc7511c8480bcfa">XAieTile_PlIntcL1BlockNorthClr()</a>.</p>

</div>
</div>
<a class="anchor" id="a3cd399f6ae31b2845e452e17191c268c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::BlockNorthSetOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Block north set register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ae9f78282ff8fe22f8068639dbdb8f217">XAieTile_PlIntcL1BlockNorthSet()</a>.</p>

</div>
</div>
<a class="anchor" id="a6153abe885312a0db52bdb794f64d477"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::BlockNorthValueOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Block north value register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ad72be00d9602288b22dd4770aaa36af2">XAieTile_PlIntcL1BlockNorthVal()</a>.</p>

</div>
</div>
<a class="anchor" id="a2034d6df061c0f43c715bf1a3bd58e50"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::DisableOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Disable register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ae31fcd6432ac33b0d3ff366ff98c08d2">XAieTile_PlIntcL1Disable()</a>.</p>

</div>
</div>
<a class="anchor" id="a6a6a0c39de21603a5936741110c491a2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::EnableOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Enable register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#a93063e14b59ecc23583405e494fa4aa7">XAieTile_PlIntcL1Enable()</a>.</p>

</div>
</div>
<a class="anchor" id="a17b1fdfcddd578bb793a0b77db6eccfc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::IrqEventOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Irq event register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#a053e0dba6e18d55e038e81129cc4c8b3">XAieTile_PlIntcL1IrqEventGet()</a>, and <a class="el" href="xaietile__pl_8h.html#a3ce511eb5da43182af778b618e5849c4">XAieTile_PlIntcL1IrqEventSet()</a>.</p>

</div>
</div>
<a class="anchor" id="ac30812cbbcaec2344ab0a9ced78c07d6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a> XAieGbl_1stIrqCntr::IrqEventRegFld[4U]</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Irq event register field. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#a053e0dba6e18d55e038e81129cc4c8b3">XAieTile_PlIntcL1IrqEventGet()</a>, and <a class="el" href="xaietile__pl_8h.html#a3ce511eb5da43182af778b618e5849c4">XAieTile_PlIntcL1IrqEventSet()</a>.</p>

</div>
</div>
<a class="anchor" id="a34453c066e03c5606ed2c6c52bb23db8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a> XAieGbl_1stIrqCntr::IrqNoFld</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Irq No. </p>
<p>register field </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#aba23fcaaf39c1a3c8df127220274e53c">XAieTile_PlIntcL1IrqNoGet()</a>, and <a class="el" href="xaietile__pl_8h.html#ac1cf778eea154996848ae857f2525609">XAieTile_PlIntcL1IrqNoSet()</a>.</p>

</div>
</div>
<a class="anchor" id="a6052b98ff1dfec4fa40aff2114eedff0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::IrqNoOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Irq number register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#aba23fcaaf39c1a3c8df127220274e53c">XAieTile_PlIntcL1IrqNoGet()</a>, and <a class="el" href="xaietile__pl_8h.html#ac1cf778eea154996848ae857f2525609">XAieTile_PlIntcL1IrqNoSet()</a>.</p>

</div>
</div>
<a class="anchor" id="a0ac949b94c8f2de1f000fde19821042e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html">XAieGbl_RegFldAttr</a> XAieGbl_1stIrqCntr::IrqsMask</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Irqs mask enable/disable/mask register field. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ae31fcd6432ac33b0d3ff366ff98c08d2">XAieTile_PlIntcL1Disable()</a>, <a class="el" href="xaietile__pl_8h.html#a93063e14b59ecc23583405e494fa4aa7">XAieTile_PlIntcL1Enable()</a>, <a class="el" href="xaietile__pl_8h.html#a79424d556527d899c9c5546b9aca1fbe">XAieTile_PlIntcL1Mask()</a>, <a class="el" href="xaietile__pl_8h.html#af7da527ce69c1c459de03ec177b6cff2">XAieTile_PlIntcL1StatusClr()</a>, and <a class="el" href="xaietile__pl_8h.html#a12a552f9a564bae317389f4a9f9686a2">XAieTile_PlIntcL1StatusGet()</a>.</p>

</div>
</div>
<a class="anchor" id="ae08b2f3f2db876afc435f8ba2a9a4783"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::MaskOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mask register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#a79424d556527d899c9c5546b9aca1fbe">XAieTile_PlIntcL1Mask()</a>.</p>

</div>
</div>
<a class="anchor" id="a4029ca496331d2f4af1650a1e87f9500"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::StatusOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Status register offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#af7da527ce69c1c459de03ec177b6cff2">XAieTile_PlIntcL1StatusClr()</a>, and <a class="el" href="xaietile__pl_8h.html#a12a552f9a564bae317389f4a9f9686a2">XAieTile_PlIntcL1StatusGet()</a>.</p>

</div>
</div>
<a class="anchor" id="a9751be05f8f1d085db131e370f672ebe"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XAieGbl_1stIrqCntr::SwitchOff</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Switch offset. </p>

<p>Referenced by <a class="el" href="xaietile__pl_8h.html#ab0f0a542ca10735adbc7511c8480bcfa">XAieTile_PlIntcL1BlockNorthClr()</a>, <a class="el" href="xaietile__pl_8h.html#ae9f78282ff8fe22f8068639dbdb8f217">XAieTile_PlIntcL1BlockNorthSet()</a>, <a class="el" href="xaietile__pl_8h.html#ad72be00d9602288b22dd4770aaa36af2">XAieTile_PlIntcL1BlockNorthVal()</a>, <a class="el" href="xaietile__pl_8h.html#ae31fcd6432ac33b0d3ff366ff98c08d2">XAieTile_PlIntcL1Disable()</a>, <a class="el" href="xaietile__pl_8h.html#a93063e14b59ecc23583405e494fa4aa7">XAieTile_PlIntcL1Enable()</a>, <a class="el" href="xaietile__pl_8h.html#a053e0dba6e18d55e038e81129cc4c8b3">XAieTile_PlIntcL1IrqEventGet()</a>, <a class="el" href="xaietile__pl_8h.html#a3ce511eb5da43182af778b618e5849c4">XAieTile_PlIntcL1IrqEventSet()</a>, <a class="el" href="xaietile__pl_8h.html#aba23fcaaf39c1a3c8df127220274e53c">XAieTile_PlIntcL1IrqNoGet()</a>, <a class="el" href="xaietile__pl_8h.html#ac1cf778eea154996848ae857f2525609">XAieTile_PlIntcL1IrqNoSet()</a>, <a class="el" href="xaietile__pl_8h.html#a79424d556527d899c9c5546b9aca1fbe">XAieTile_PlIntcL1Mask()</a>, <a class="el" href="xaietile__pl_8h.html#af7da527ce69c1c459de03ec177b6cff2">XAieTile_PlIntcL1StatusClr()</a>, and <a class="el" href="xaietile__pl_8h.html#a12a552f9a564bae317389f4a9f9686a2">XAieTile_PlIntcL1StatusGet()</a>.</p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
	<p class="footer">&copy; Copyright 2015-2022 Xilinx, Inc. All Rights Reserved.</p>
	<p class="footer">&copy; Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.</p>
</div>
</body>
</html>
